1. Identificação | |
Tipo de Referência | Artigo em Evento (Conference Proceedings) |
Site | mtc-m16d.sid.inpe.br |
Código do Detentor | isadg {BR SPINPE} ibi 8JMKD3MGPCW/3DT298S |
Identificador | 8JMKD3MGP7W/3EEK9BL |
Repositório | sid.inpe.br/mtc-m19/2013/07.11.16.24 (acesso restrito) |
Última Atualização | 2013:07.12.11.37.22 (UTC) administrator |
Repositório de Metadados | sid.inpe.br/mtc-m19/2013/07.11.16.24.38 |
Última Atualização dos Metadados | 2018:06.05.04.14.35 (UTC) administrator |
DOI | 10.1109/AERO.2013.6497170 |
ISBN | 978-1-4673-1811-2 |
Chave de Citação | GuareschiAzKaReDuScDe:2013:CoTeBe |
Título | Configurable test bed design for nanosats to qualify commercial and customized integrated circuits |
Ano | 2013 |
Data de Acesso | 29 mar. 2024 |
Tipo Secundário | PRE CI |
Número de Arquivos | 1 |
Tamanho | 455 KiB |
|
2. Contextualização | |
Autor | 1 Guareschi, William 2 Azambuja, Jose 3 Kastensmidt, Fernanda 4 Reis, Ricardo 5 Durão, Otávio Santos Cupertino 6 Schuch, Nelson 7 Dessbesel, Gustavo |
Identificador de Curriculo | 1 2 3 4 5 8JMKD3MGP5W/3C9JJ2L |
Grupo | 1 2 3 4 5 CPA-CPA-INPE-MCTI-GOV-BR 6 CRS-CCR-INPE-MCTI-GOV-BR |
Afiliação | 1 UFRGS, PGMICRO, PPGC, Porto Alegre, RS, Brazil 2 UFRGS, PGMICRO, PPGC, Porto Alegre, RS, Brazil 3 UFRGS, PGMICRO, PPGC, Porto Alegre, RS, Brazil 4 UFRGS, PGMICRO, PPGC, Porto Alegre, RS, Brazil 5 Instituto Nacional de Pesquisas Espaciais (INPE) 6 Instituto Nacional de Pesquisas Espaciais (INPE) |
Endereço de e-Mail do Autor | 1 wnguareschi@inf.ufrgs.br 2 jrfazambuja@inf.ufrgs.br 3 fglima@inf.ufrgs.br 4 reis@inf.ufrgs.br 5 durao@dir.inpe.br 6 njschuch@lacesm.ufsm.br 7 gustavo.dessbesel@smdh.org |
Endereço de e-Mail | marcelo.pazos@inpe.br |
Nome do Evento | IEEE Aerospace Conference. |
Localização do Evento | Big Sky, Montana, USA |
Data | Mar. 2 - 9, 2013 |
Título do Livro | Proceedings |
Histórico (UTC) | 2013-07-11 16:24:38 :: marcelo.pazos@sid.inpe.br -> administrator :: 2018-06-05 04:14:35 :: administrator -> marcelo.pazos@inpe.br :: 2013 |
|
3. Conteúdo e estrutura | |
É a matriz ou uma cópia? | é a matriz |
Estágio do Conteúdo | concluido |
Transferível | 1 |
Tipo do Conteúdo | External Contribution |
Tipo de Versão | publisher |
Palavras-Chave | adaptive systems computer hardware description languages control systems data transfer equipment testing flash memory flight control systems hardening integrated circuits ionizing radiation nanosatellites network protocols |
Resumo | The use of small satellites has increased substantially in recent years due to the reduced cost of their development and launch, as well to the flexibility offered by commercial components. The test bed is a platform that allows components to be evaluated and tested in space. It is a flexible platform, which can be adjusted to a wide quantity of components and interfaces. This work proposes the design and implementation of a test bed suitable for test and evaluation of commercial circuits used in nanosatellites. The development of such a platform allows developers to reduce the efforts in the integration of components and therefore speed up the overall system development time. The proposed test bed is a configurable platform implemented using a Field Programmable Gate Array (FPGA) that controls the communication protocols and connections to the devices under test. The Flash-based ProASIC3E FPGA from Microsemi is used as a control system. This adaptive system enables the control of new payloads and softcores for test and validation in space. Thus, the integration can be easily performed through configuration parameters. It is intended for modularity. Each component connected to the test bed can have a specific interface programmed using a hardware description language (HDL). The data of each component is stored in embedded memories. Each component has its own memory space. The size of the allocated memory can be also configured. The data transfer priority can be set and packaging can be added to the logic, when needed. Communication with peripheral devices and with the Onboard Computer (OBC) is done through the pre-implemented protocols, such as I2C (Inter-Integrated Circuit), SPI (Serial Peripheral Interface) and external memory control. In loco primary tests demonstrated the control system's functionality. The commercial ProASIC3E FPGA family is not space-flight qualified, but tests have been made under Total Ionizing Dose (TID) showing its robustness up to 25 krads (Si). When considering proton and heavy ions, flash-based FPGAs provide immunity to configuration loss and low bit-flips susceptibility in flash memory. In this first version of the test bed two components are connected to the controller FPGA: a commercial magnetometer and a hardened test chip. The embedded FPGA implements a Single Event Effects (SEE) hardened microprocessor and few other soft-cores to be used in space. This test bed will be used in the NanoSatC-BR1, the first Brazilian Cubesat scheduled to be launched in mid-2013. |
Área | ETES |
Arranjo 1 | urlib.net > BDMCI > Fonds > Produção anterior à 2021 > CRCRS > Configurable test bed... |
Arranjo 2 | urlib.net > BDMCI > Fonds > Produção anterior à 2021 > COGCT > Configurable test bed... |
Conteúdo da Pasta doc | acessar |
Conteúdo da Pasta source | não têm arquivos |
Conteúdo da Pasta agreement | |
|
4. Condições de acesso e uso | |
Idioma | en |
Arquivo Alvo | 06497170.pdf |
Grupo de Usuários | administrator marcelo.pazos@inpe.br |
Grupo de Leitores | administrator marcelo.pazos@inpe.br |
Visibilidade | shown |
Permissão de Leitura | deny from all and allow from 150.163 |
Permissão de Atualização | não transferida |
|
5. Fontes relacionadas | |
Repositório Espelho | iconet.com.br/banon/2006/11.26.21.31 |
Unidades Imediatamente Superiores | 8JMKD3MGPCW/3EUFCFP 8JMKD3MGPCW/3EUP7JP |
Lista de Itens Citando | sid.inpe.br/bibdigital/2013/10.04.21.53 1 sid.inpe.br/mtc-m21/2012/07.13.14.57.36 1 |
Acervo Hospedeiro | sid.inpe.br/mtc-m19@80/2009/08.21.17.02 |
|
6. Notas | |
Notas | 2013 IEEE Aerospace Conference, AERO 2013, March 2, 2013 - March 9, 2013 |
Campos Vazios | archivingpolicy archivist callnumber copyholder copyright creatorhistory descriptionlevel dissemination edition editor format issn label lineage mark nextedition numberofvolumes orcid organization pages parameterlist parentrepositories previousedition previouslowerunit progress project publisher publisheraddress rightsholder schedulinginformation secondarydate secondarykey secondarymark serieseditor session shorttitle sponsor subject tertiarymark tertiarytype type url volume |
|
7. Controle da descrição | |
e-Mail (login) | marcelo.pazos@inpe.br |
atualizar | |
|